1. Technical Field
The disclosure relates to a semiconductor structure and a method for manufacturing the same. More particularly, the disclosure relates to a semiconductor structure, in which a plurality of first holes and a plurality of second holes are equally spaced apart from each other in at least an arranged direction, and a method for manufacturing the same.
2. Description of the Related Art
As the layers stacked in 3-D semiconductor structures increase, the height of line structures in the 3-D semiconductor structures increases and thereby may face the collapse or bending problems. Compared to the line structure, hole structure is more robust. As such, the hole structure is introduced into the 3-D semiconductor structures. For example, in a 3-D vertical channel memory device, holes may be constructed for the formation of bit lines (BLs).
In a 3-D vertical channel memory device, the layers of word lines (WLs) are preferably formed by metal due to a lower resistance. As such, a replacing step from polysilicon to the metal must be carried out. This replacing step is typically conducted through holes.
However, the holes for WLs replacement and the holes for BLs are not self-aligned. Thus, a process window for the alignment is needed, and the overall cell size is increased. Nevertheless, an inaccuracy still presents between the two kinds of holes.